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Real-Time and Embedded Systems

Academic Conferences - Real-Time and Embedded Systems
Academic Conferences

By : Global Science & Technology Forum

Date : 2010

Location : Singapore / Singapore

PDF 142p
Description :

The conference presents the latest research and advances from researchers and developers in the field of technology of real-time and embedded systems. Aiming to be expansive and inclusive, RTES 2010 looks to embrace new and emerging areas of real-time and embedded systems research.

Keywords :

Architecture description languages, Embedded Control Systems, distributed real-time operating system, Knowledge Management System, Technology proceedings

Keywords inside documents :

system ,systems ,tasks ,power ,application ,scheduling ,control ,embedded ,cache ,software ,execution ,knowledge ,service ,processor ,architecture ,performance ,component ,figure ,frequency ,network

Associated industries : Engineering - Engineering - Software & Computing -
Product/ documentation details
A Real-time Service Oriented Infrastructure

Company Description : The advancements in distributed computing havedriven the emergence of service-based infrastructures that allowfor on-demand provision of ICT assets. Taking into consideration the complexity of distributed environments, significant challenges exist in providing and managing the offered on-demand resources with the required level of Quality of Service (QoS),especially for real-time interactive and streaming applications. In this paper we propose an approach for providing real-time QoS guarantees by enhancing service oriented infrastructures with coherent and consistent real-time attributes at various levels(application, network, storage, processing). The approach considers the full lifecycle of service-based systems including service engineering, Service Level Agreement (SLA) negotiation and management, service provisioning and monitoring. QoS parameters at application, platform and infrastructure levels are given specific attention as the basis for provisioning policies inthe context of temporal constraints.

Product Type : Academic Conferences

Author : Various

PDF 6p

Languages : English

Proceedings from the Real-Time and Embedded Systems (RTES 2010) conference.

 

Real-time and embedded systems have become a necessity in almost every aspect of the daily lives of individuals and organizations, from self-contained applications to those embedded in various devices and services (mobile phones, vital sign sensors, medication dispensers, home appliances, engine ignition systems, etc). A large proportion of these systems are mission/life critical and time sensitive.

 

The conference presents the latest research and advances from researchers and developers in the field of technology of real-time and embedded systems. Aiming to be expansive and inclusive, RTES 2010 looks to embrace new and emerging areas of real-time and embedded systems research.

 


Abstracts of papers included in the the Real-Time and Embedded Systems (RTES 2010) conference proceedings.

 

1. Design and Debugging of Parallel Architectures Using the ISAC Language

Zdenek Prikryl, Jakub Kroustek, Tomas Hruska, Dusan Kolar, Karel Masarik, Adam Husar, Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic


Trend of nowadays embedded systems is placing more than one application-specific instruction set processor (ASIP) on one chip (multi-processor systems on a chip). This allows parallel processing of multimedia and network applications, where input is usually a data stream. Each of these processors is highly optimized for a specific task. Other forms of suitable parallel architectures are very long instruction wordprocessors (VLIW) and multi-core processors. These parallel architectures are often used in multi-processor systems on a chip. Architecture description languages (ADL) are very effective for description of simple processors. However, support for description of parallel architectures and multi-processor systems is very low or completely missing in these languages. Therefore, we introduce new constructions of an architecture description language ISAC allowing easy and fast prototyping of such processors and systems.

 

2. A Distributed Real-Time Operating System for Embedded Control Systems

Yuichi Itami , Myungryun Yoo and Takanori Yokoyama, Tokyo City University 1-28-1, Tamazutsumi, Setagaya-ku, Tokyo 158-8557 Japan

 

The paper presents a distributed real-time operatingsystem (DRTOS) for distributed embedded control systems such as automotive control systems. A control application program is usually designed as a set of tasks, which are allocated to nodes of the distributed control system. The tasks may be reallocated when the system is rebuilt or the application program is reused for another system. Existing real-time operating systems do not provide location transparent system calls for task management, so we have to rewrite the source code of the application program to reallocate the tasks. To improve the portability and there usability of the task-based control application program, location-transparent task management is required. We have developed a DRTOS that provides location-transparent system calls for task management such as task activation and inter-task synchronization. The DRTOS is an extension to OSEK OS, which is a standard operating system for automotive control.

The DRTOS has an inter-node time synchronization mechanism to realize task management based on the global time. This is supported by clock synchronization of FlexRay, which is a real-time network based on aTDMA (Time Division Multiple Access) protocol. By using the DRTOS, we can develop a distributed control application program in which tasks are scheduled based onthe global time. We can also reallocate the tasks just by reconfiguration, without rewriting source code of the application program. The worst case end-to-end execution timeof the remote system call of the DRTOS is predictable if the FlexRay communication is well configured.


3. Power-aware Real Time Operating System (PaRTOS) for Small Microcontrollers

Litanaarachchi Lekamalage Chamara Kasun, Su-Lim Tan, Wooi-Boon Go, School of computer engineering, Nanyang technological University, Singapore.

 

This paper describes a scheduler for an 8-bit microcontroller which takes advantage of power saving features such as frequency scaling and low power saving features such as frequency scaling and low power modes during runtime operations. The proposed scheduler will reduce the power consumption of the microcontroller in a dynamic fashion according to the available slack time in which the maximum processing power is not required for the computational and I/O tasks at hand.

 

4. NSA-DPR: A Novel System Architecture for Dynamical and Partial Reconfiguration Applications with RTOS Support

Guojun Dai, Feng Chen, Hong Zeng, Zhigang Gao, College of Computer Science, Hangzhou Dianzi University, Hangzhou, Zhejiang, 310018, China


Reconfigurable systems provide both the flexibilityof software and the high performance of hardware and have become one of the focuses in the embedded area. This paper presents the NSA-DPR, a novel system architecture (NSA)designed for dynamical and partial reconfiguration (DPR)applications with real-time operating system (RTOS) support,and discusses effective management and co-scheduling methodof hardware/software tasks in order to improve processing time and flexibility of systems. The NSA-DPR also supports the applications of mid-distance wireless reconfiguration. The experimental results show the NSA-DPR implementation (are configurable system using Xilinx Virtex-II pro/Virtex-IVwith Compact-Flash external memory) saves hardware resources compared to function-fixed pure hardware systems and reduces processing time in comparison with software processing systems.

 

5. A multi agent knowledge management system architecture for the
IT industry

Pooja Jain, Jaypee University of Information, Technology, Waknaghat, Solan, India

Deepak Dahiya, Jaypee University of Information, Technology, Waknaghat, Solan, India

 

The  software  industry  has  been  instrumental  in driving  the  economy  of  the  nation  on  to  a  rapid growth  curve.  The  ultimate  aim  of  a  software company  is  to  deliver  premium  quality software products while giving unmatched value to enterprises worldwide  at  an  affordable  cost.  Software  systems come  and  go  through  a  series  of  passages  that account  for  their  inception,  initial development, productive  operation,  upkeep,  and  retirement  from one generation to another. There is a huge amount of knowledge  in  an  enterprise  which  should  be effectively  managed.  If  a  proper knowledge management  system  is  in place  then all  the  software engineering  processes  become  easy  and  less  time consuming. This paper introduces such a Knowledge Management  System (KMS) based  on  multi  agent technology, which will  benefit  the  software  industry at large.

 

6. A Real-time Service Oriented Infrastructure

Dimosthenis Kyriazis, Andreas Menychtas, George, Kousiouris, National Technical University of Athens, Athens, Greece

Karsten Oberle, Thomas Voith, Alcatel Lucent, Stuttgart, Germany

Michael Boniface, University of Southampton IT Innovation Centre, Southampton, UK

Eduardo Oliveros, Telefonica Investigation e Disarollo, Madrid, Spain

Tommaso Cucinotta, Scuola Superiore Sant'Anna, Pisa, Italy

Sören Berger, University of Stuttgart, Stuttgart, Germany


The advancements in distributed computing havedriven the emergence of service-based infrastructures that allowfor on-demand provision of ICT assets. Taking into consideration the complexity of distributed environments, significant challenges exist in providing and managing the offered on-demand resources with the required level of Quality of Service (QoS),especially for real-time interactive and streaming applications. In this paper we propose an approach for providing real-time QoS guarantees by enhancing service oriented infrastructures with coherent and consistent real-time attributes at various levels(application, network, storage, processing). The approach considers the full lifecycle of service-based systems including service engineering, Service Level Agreement (SLA) negotiation and management, service provisioning and monitoring. QoS parameters at application, platform and infrastructure levels are given specific attention as the basis for provisioning policies inthe context of temporal constraints.

 

7. An Efficient Algorithm To Find Test Pattern Using SSBDD

Mousumi Saha, Dept. of Computer Application(C A), National Institute Of Technology (N I T), Durgapur, India.
Naveen Singh Bisht, Dept. of Computer Application(C A), National Institute Of Technology (N I T), Durgapur, India.
Shrinivas Yadav, Dept. of Computer Application(C A), National Institute Of Technology (N I T), Durgapur, India.
Praveen Kumar K, Dept. of Computer Application(C A), National Institute Of Technology (N I T), Durgapur, India.

 

Structurally Synthesized BDDs (SSBDDs) have an important characteristic property of keeping information about Boolean circuit’s structure. Boolean difference of a circuit is used to find test pattern for stuck at fault in combinational circuit but the algebraic manipulation involved in solving Boolean difference is a tedious job. In this paper an efficient algorithm is proposed to find the test patterns which use SSBDD based on Boolean difference concept. This model reduces algebraic manipulations and takes less time to compute the test pattern.

 

8. A Cache-based Anomaly Detector for Embedded Systems

Mahroo Zandrahimi, Department of computer Engineering and IT, Amirkabir University of Technology, Tehran, Iran
Hamid R. Zaranndi, Alireza Zarei, Department of computer Engineering and IT, Amirkabir University of Technology, Tehran, Iran

 

Embedded systems are being deployed as a part of critical infrastructures and are very vulnerable to faults and defects. Anomaly detection is often the primary means of providing early indication of faults and defects. Detecting an anomaly early on, pays off since further damage is avoided. This paper presents a cache-based method, which constructs a cache consisting of events from a stream of data considered to be normal .Consequently, during test stage, if an event does not exist in the cache, a miss will happen. An anomaly exists in test data provided that the hit rate of the cache does not reach a predefined threshold. The experiments on 112 standard benchmarks show that the cache-based method can detect 100% of anomalies. Also, the area overhead of the cache-based detector grows linearly, while the area overhead of other typical detectors grows exponentially by the increase in one of the detector's parameters.

 

9. Plug-in Based Debugging For Embedded Systems

Shahabeddin Farokhzad, RMIT University

Gokhan Tanyeri, Clarinox Technologies Pty. Ltd

Trish Messiter, Clarinox Technologies Pty. Ltd

Paul Beckett1, RMIT University

A flexible, plug-in based debugger is described. The debug system, built as a C++ interface class, is independent of the physical layer, which can be a network, aserial connection (e.g., RS232), or even a file on harddisk or flash memory. The plug-in mechanism is described and an example presented of how these are written to fit into the debugger environment.

 

10. Primes in Component Languages

M.W Shields, S. Moschoyiannis and P.J Kraus, Department of Computing, University of Surrey, Guildford, Surrey

 

We investigate order-thoretic properties of sets of tuples of strings (component vectors) which provide a semantics for a model of software components. Under certain circumstances ("normality") on sets of such vectors, we characterise prime elements and establish prime algebraicity. We indicate how such work might constitute a formal basis for an automata theory of components.

 

11. Behavioural Presentations and an Automata Theory of Components

M.W. Shields, S. Moschoyiannis and P.J. Krause, Department of Computing
University of Surrey, Guildford, Surrey

 

In this paper, we make an intensive study of a mathematical model of components, as a preliminary to an analysis of problems arising in the area of component-based software. We begin with a simple model, link it to the behavioural presentation model, which suggests certain refinements of the original model. These refinements lead to an automata theory of components. Finally, we establish that two such automata determine the same component if and only if they are related by a form of behavioural equivalence, reminiscent of strong equivalence in CCS

 

12. SIGN LANGUAGE

R.Dhanagopal, ECE,Jayaram College of Engg & Tech, Trichy,India

B.Manivasakam, ECE,Jayaram College of Engg & Tech, Trichy,India

 

Usually a human interaction focuses on the sound world, where the communication is based on the speech and in which most information is conveyed via voice andother sounds. However, there are people who live in the world of silence. For them nothing can be heard, as they are hearing impaired. For all of them a voice communication is impossible or troublesome. Hence they have invented a sign language. The sign language consists of a grammar and a vocabulary. Usually the grammar is significantly different to the spoken and written languages.Where as the vocabulary is composed of many hand gestures and hand movements which convey the most important information, but which are supported by the whole body movement and facial expressions. Considering the differences in the way the hearing impaired observe the world, they encounter huge difficulties while learning and using the writing language, which is so common in daily communication.

Since this sign language cannot be understand by others, we are in need of systems which can understand sign language. The existing systems handle that task not appropriate and accurate. We introduce the concept of a chat for the sign language based communication, which overcomes the deficiencies of the existing approaches. In the current system there is an action sensor available, this sensor has pressure switches when any pressure is given then the pressure switch will beclosed and the signal is given to microcontroller. The microcontroller senses the signal coming from the pressure switch and it understands the switch position and it sends the command signal to the computer through RS232 cable.The RS232 cable is used to convert microcontroller understandable signal to computer understandable signal. As soon as the computer gets the signal the program written in the computer will detect the particular wordand it will be played at the same instant. That’s how the sign language is converted in to voice language.

 

13. Improved Hybrid RMGT Distributed Scheduling Algorithm

A.Prashanth Rao, Reasearch Scholar, JNTU College of Engineering, Hyderabad, A.P, India

Dr.A. Govardhan, Professor of CSE & Principal, JNTU College of Engineering, KarimNagar (Dt), A.P, India

C.Venu Gopal, Professor of CSE, Osmania University, Hyderabad, A.P, India.


In the design of real time distributed system, the scheduling problem is considered to be an important one and has been addressed by many researches. However researches were developed many scheduling algorithm but there is no optimal dynamic scheduling algorithm. In this paper, we describe a heuristic scheduling algorithm which combines both static priority algorithm and dynamic algorithm. Initially a processor can be allocated a fixed number of units based on Rate Monotonic Algorithm and there will certain number of units are meant for dynamic algorithm. When a task arrives at a node, the local scheduler at that node attempts to guarantee that that the task will complete execution before its deadline, on that node. Ifthe attempt fails the scheduler searches the node where task will feasibly scheduled. This type of scheduling performs best results than the previous work and this algorithm are more suitable for real world applications.

 

14. Uniform scheduling of internal and external events under SRP-EDF

Simon Aittamaa, Lulea University of Technology, 97187 Lulea Sweden

Johan Eriksson, Lulea University of Technology, 97187 Lulea Sweden

Per Lindgren, Lulea University of Technology, 97187 Lulea Sweden


With the growing complexity of modern embedded real-time systems, scheduling and managing of resources has become a daunting task. While scheduling and resource management for internal events can be simplified by adopting a common place real-time operating system (RTOS), scheduling and resource management for external events are left in the hands of the programmer, not to mention managing resources across the boundaries of external and internalevents. In this paper we propose a unified system view in corporating earliest deadline first (EDF) for scheduling andstack resource policy (SRP) for resource management. From an embedded real-time system view, EDF+SRP is attractive not only because stack usage can be minimized, but also because the cost of a pre-emption becomes almost as cheap as a regular function call, and the number of preemptions is kept to a minimum. SRP+EDF also lifts the burden of manual resource management from the programmer and incorporates it into the scheduler. Furthermore, we show the efficiency of the SRP+EDF scheme, the intuitiveness of the programming model (in terms of reactive programming), and the simplicity of the implementation.

 

15. A Reconfigurable Switch Architecture to Enhance Reliability of Network-on-Chips

Z. Shirmohammadi, M. Jalal, A. Patooghy, S. G. Miremadi, Department of Computer Engineering, Sharif University of Technology, Tehran, Iran


Switches and communication links of Network onChips (NoCs) are highly vulnerable to transient faults due to the use of nano-scale VLSI technologies in fabrication of NoCs. This paper proposes a reconfigurable switch architecture which is capable of operating in four configurations with different levels of reliability. This is done by the use of a local configuration controller logic which is fully protected against transient faults. When a controller detects a high error rate situation, it configures the switch to a high reliability mode and vice versa. Reconfiguration policy is designed in a way which minimizes the imposed performance and power overheads to the switch. Evaluations are done by a cycle accurate NoC simulator with Orion patch for power estimation. Simulation results show a noticeable reliability improvement with an egligible performance overhead. In addition, power saving ofat least 20% is achieved by the proposed architecture.

 

16. Guaranteed Bounds for the Control Performance Evaluation in Distributed System Architectures

Tobias Bund, Steffen Moser, Steffen Kollmann and Frank Slomka, Institute of Embedded Systems/Real-Time Systems, Faculty of Engineering and Computer Science, Ulm University, 89069 Ulm, Germany

 

Controlling physical systems is a common task ofembedded systems. The requirements for a control system arecorrectness, stability and control performance. This leads to realtimeconstraints which have to be hold by the implementedcontroller. We present an approach that supports the controlengineer to get guaranteed bounds for the timing behavior of thecontroller at early design steps. This is done by connecting theMatlab/Simulink environment widely used for controller designto real-time analysis using a mapping between graphs.

 

17. Energy-Aware Scheduling for Embedded Real-Time Systems with
Rechargeable Batteries

Chi-Lin Chou, Chin-Fu Kuo, Department of Computer Science and Information Engineering, National University of Kaohsiung, Kaohsiung, Taiwan, R.O.C.

 

Due to the power limited nature of embedded systems, power efficiency is one issue in the design of embedded systems.We propose a design in which an embedded system is powered by dual rechargeable batteries and the batteries don’t operate simultaneously. We propose a linear programming based approach to extend the lifetime of batteries. With the proposed approach, the lifetime of a battery will be extended and the design complexity of the system will be reduced. A simulation model is built to investigate the performance of the proposed approach. The capability of the proposed approach is evaluated by a series of simulations, for which we have encouraging results.

 

18. Effect of Exact Admission Controller on the Loss Ratio of EDF Scheduling Policy

Sudipta Das, Department of electrical Engineering, Indian Institute of science, Bangalore, 560012

Lawrence Jenkins, Department of electrical Engineering, Indian Institute of science, Bangalore, 560012

Debasis Sengupta,  Department of electrical Engineering, Indian Institute of science, Bangalore, 560012

 

In this paper, we prove that the loss ratio of a G/G/1/G system with deadline till the end of service, operating under the EDF scheduling policy with preemption, can only be reduced by using an Exact Admission Controller. On the other hand, for a G/M/1/G system, this reduction is less than that arising from a simple modification of the EDF Scheduling policy, where a job about to get the server is automatically discarded if it is found at that time that itc cannot meet the deadline. Results of Monte Carlo simulations suggest that this modification produces substantial reduction of the loss ratio when the arrival rate is high, but the Exact Admission Controller is able to achieve comparable reduction of the loss ratio in this situation only if the mean relative deadline is large.

 

19. A Step Toward Exploiting Task-Affinity in Multi-Core Architectures to Improve Determinism of Real-Time Streaming Applications

Lucas Martins De Marchi, Polytechnic School, University of Sao Paulo, Sao Paulo, Brazil

Patrick Bellasi, William Fornaciari, Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milano, Italy

Betz Wolfgang, Advanced Systems Technology, STMicroelectronics, Agrate Brianza, Italy

 

Cooperative applications represent a class of multi-tasking programs where different tasks execute concurrently according to a producer-consumer pattern. This class of programs is increasingly adopted on multi-core architectures and especially on multimedia mobile devices based on MPSoCs. Indeed, it allows to better exploit the architectural parallelism. However, the run-time efficient usage of memory hierarchies still is mandatory to achieve really good performance. Moreover,when responsiveness and predictability of the application are required, obtaining strict real-time behaviors on these architectures is still an interesting research topic.This work proposes a software mechanism to enhance soft real-time behaviours of cooperative applications. Targeting the Linux kernel, this mechanism enhances its real-time scheduler by introducing the support for cache-aware scheduling. Onsome architectures, the experiments conducted on a synthetic benchmark allow to observe significant improvements, bothon execution predictability and data throughput. Further improvements already under investigation are fore seen to extend the benefits to more architectures.

 

20. Loss Ratios of EDF and FCFS Scheduling Policies under a Performance Enhancing Modification

Sudipta Das, Department of Electrical Engineering, Indian Institute of Science, Bangalore 560012

Lawrence Jenkins, Department of Electrical Engineering, Indian Institute of Science, Bangalore 560012

Debasis Sengupta, Applied Statistical Unit, Indian Statistical Institute, Kolkata 7000108


In a real time system, processor time is sometimes wasted on jobs that have no chance of being completed before their respective deadlines. Such wastage may be avoided by routinely discarding such jobs at the epoch of their getting the server. However, this modification, which is referred to in this paper as the Early job Discarding Technique (EDT), makes the scheduling policy dependent on service time. As a result, the optimality of the Earliest Deadline First (EDF) scheduling policy becomes inapplicable. We show in this paper that the said modification preserves the superiority of the EDF over the First Come First Serve (FCFS) scheduling policy in terms of loss ratio.Results of Monte Carlo simulations indicate that the gap between the loss ratios of the two scheduling policies under EDT widens with higher arrival rate. Index Terms—Firm real time system, real time queue, Earlies tDeadline First, First Come First Serve, service time dependent scheduling, loss ratio comparison.

 

21. €‚ƒGPS Based Carrier Synchronization Distributed Wireless Networks

€‚€ƒ„…†‡ˆ‰€Š€ƒ…‹Œ‹Ž„†ˆ‘€‘€’“ŒM.R. Ahmed, D.N. Amarasingh, G.G . Borg, Research School of Physics and Engineering, The Australian National University, ACT 0200

 

Networks of distributed wireless stations rely on carrier coherence and timing synchronization to lock the local oscillators and avoid the need for complex multi-carrier and timing acquisition. In this paper we present initial results of a frequency look loop and GPD based synchronization for distributed wireless networks.

 

22. Evaluation of Application Mapping for Network-on-Chips

M. Jalal, Z. Shirmohammadi, A. Patooghy, S. G. Miremadi, Department of Computer Engineering, Sharif University of Technology, Tehran, Iran

 

Mapping of tasks on the cores of a Network-on-Chip(NoC) has direct impact on the efficiency of the network. This paper provides a comprehensive study regarding application mapping for NoCs to clarify their pros and cons. The study considers different aspects including performance, power consumption, and reliability of mappings. Four mappings named NMAP, RMAP, Random, and Adhoc are used in this study by the means of a cycle accurate NoC simulator. Our study shows that the RMAP provides the maximum reliability for NoC with a low performance overhead. On the other hand, Random mapping requires the lowest time to complete mapping of the task on the chip. The power estimation patch of Orion is used in the simulation to explore the power consumption of a typical NoC using any of the mentioned mappings. Simulations are done for three different benchmarks i.e., MPEG, VOPD, and OPD application graphs.

 

23. A wireless medical network's research and development

Qin Dingding, College of Information and Communication Engineering
Harbin Engineering University, Harbin, China

Jiao Shuhong, College of Information and Communication Engineering
Harbin Engineering University, Harbin, China

Rong Xing, Gas Works Department, Dalian Gas Group Company Limited
Dalian, China

 

This paper introduces a wireless medical network's research and development. The wireless medical terminal is developed with radio frequency technology and biomedical sensor. The network can be simply set up and the communication modules work well according to the performance. The system runs a time-division full-duplex communication, the working state of each node is triggered by the receiving information, a responsive communication can be established between the nodes in forms of point to point or networks. And with the concisely designed structure and the transparent communication protocol,both software and hardware of the system can be easily upgraded. It’s a feasibility to expand wireless medical method.

 

24. Reconfigurable Logic for Synchronization of Endomicroscopy Scanning and Incrementally Accumulated Volume Rendering

CHIEW Wei Ming, LIN Feng, QIAN Kemao, Stephanus Surijadarma TANDJUNG, SEAH Hock Soon, School of Computer Engineering, Nanyang Technological University, Singapore

 

The laser scanning confocal endomicroscope (LSCEM) is used to perform non-invasive, in vivo imaging at cell level. Online 3D LSCEM data visualization is thought of througha novel realtime computing system. We present such a system which performs three tasks in parallel: (i) provide automated controls for sequential acquisition of cross-sectional live images across depths on the tissue; (ii) manage and synchronize imaging and rendering tasks in real time; (iii) perform real time rendering on incrementally accumulated LSCEM datasets. Experimental results are promising.

 

25. A Power Saving Cache Architecture For Multi-Core Processor

Hsin-Liang Lin , Department of Computer Science and Engineering, Tatung University , Taipei, Taiwan

Jong-Jiann Shieh, Department of Computer Science and Engineering, Tatung University, Taipei, Taiwan

 

Reduce  power  consumption  in  the current multi-core processors is more important than performance  enhancement.  On  chip  cache  memory (instruction  cache  and  data  cache)  accounted  for nearly 45%  of  power  consumption  in  a  processor, reducing  the  power  consumption  of  cache  memory will  be  able  to  significantly  reduce  processor  power consumption.  We  propose  a  new  level-0 cache memory  in  the  memory  hierarchy.  The  cache contains  a  filter  cache  and  a  victim  cache.  The proposed  scheme  reduces  the  power  consumption  in the  instruction cache and data cache by reducing  the number  of  accesses  to  the  level-1  and  level-2  cache. We  use  a  simulation  infrastructure  base  on SimpleScalar,  sim-wattch,  and  CACTI  to  evaluate our  proposed  scheme.  Our structure  saves  28% power  consumption  as  compared  to  the  original memory architecture without victim cache and  filter cache  in  multi-core  processor.  Simulation  results show  that  the  proposed technique  improve  the performance  up  to  15%  compared  to  the conventional cache architecture.

Design and Debugging of Parallel Architectures Using the ISAC Language

Company Description : Trend of nowadays embedded systems is placing more than one application-specific instruction set processor (ASIP) on one chip (multi-processor systems on a chip). This allows parallel processing of multimedia and network applications, where input is usually a data stream. Each of these processors is highly optimized for a specific task. Other forms of suitable parallel architectures are very long instruction wordprocessors (VLIW) and multi-core processors. These parallel architectures are often used in multi-processor systems on a chip. Architecture description languages (ADL) are very effective for description of simple processors. However, support for description of parallel architectures and multi-processor systems is very low or completely missing in these languages. Therefore, we introduce new constructions of an architecture description language ISAC allowing easy and fast prototyping of such processors and systems.

Product Type : Academic Conferences

Author : Various

PDF 9p

Languages : English

A Distributed Real-Time Operating System for Embedded Control Systems

Company Description : The paper presents a distributed real-time operatingsystem (DRTOS) for distributed embedded control systems such as automotive control systems. A control application program is usually designed as a set of tasks, which are allocated to nodes of the distributed control system. The tasks may be reallocated when the system is rebuilt or the application program is reused for another system. Existing real-time operating systems do not provide location transparent system calls for task management, so we have to rewrite the source code of the application program to reallocate the tasks. To improve the portability and there usability of the task-based control application program, location-transparent task management is required. We have developed a DRTOS that provides location-transparent system calls for task management such as task activation and inter-task synchronization. The DRTOS is an extension to OSEK OS, which is a standard operating system for automotive control. The DRTOS has an inter-node time synchronization mechanism to realize task management based on the global time. This is supported by clock synchronization of FlexRay, which is a real-time network based on aTDMA (Time Division Multiple Access) protocol. By using the DRTOS, we can develop a distributed control application program in which tasks are scheduled based onthe global time. We can also reallocate the tasks just by reconfiguration, without rewriting source code of the application program. The worst case end-to-end execution timeof the remote system call of the DRTOS is predictable if the FlexRay communication is well configured.

Product Type : Academic Conferences

Author : Various

PDF 6p

Languages : English

Power-aware Real Time Operating System (PaRTOS) for Small Microcontrollers

Company Description : This paper describes a scheduler for an 8-bit microcontroller which takes advantage of power saving features such as frequency scaling and low power saving features such as frequency scaling and low power modes during runtime operations. The proposed scheduler will reduce the power consumption of the microcontroller in a dynamic fashion according to the available slack time in which the maximum processing power is not required for the computational and I/O tasks at hand.

Product Type : Academic Conferences

Author : Various

PDF 6p

Languages : English

NSA-DPR: A Novel System Architecture for Dynamical and Partial Reconfiguration Applications...

Company Description : Reconfigurable systems provide both the flexibilityof software and the high performance of hardware and have become one of the focuses in the embedded area. This paper presents the NSA-DPR, a novel system architecture (NSA)designed for dynamical and partial reconfiguration (DPR)applications with real-time operating system (RTOS) support,and discusses effective management and co-scheduling methodof hardware/software tasks in order to improve processing time and flexibility of systems. The NSA-DPR also supports the applications of mid-distance wireless reconfiguration. The experimental results show the NSA-DPR implementation (are configurable system using Xilinx Virtex-II pro/Virtex-IVwith Compact-Flash external memory) saves hardware resources compared to function-fixed pure hardware systems and reduces processing time in comparison with software processing systems.

Product Type : Academic Conferences

Author : Various

PDF 6p

Languages : English

A multi agent knowledge management system architecture for the IT industry

Company Description : The software industry has been instrumental in driving the economy of the nation on to a rapid growth curve. The ultimate aim of a software company is to deliver premium quality software products while giving unmatched value to enterprises worldwide at an affordable cost. Software systems come and go through a series of passages that account for their inception, initial development, productive operation, upkeep, and retirement from one generation to another. There is a huge amount of knowledge in an enterprise which should be effectively managed. If a proper knowledge management system is in place then all the software engineering processes become easy and less time consuming. This paper introduces such a Knowledge Management System (KMS) based on multi agent technology, which will benefit the software industry at large.

Product Type : Academic Conferences

Author : Various

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Languages : English

A Real-time Service Oriented Infrastructure

Company Description : The advancements in distributed computing havedriven the emergence of service-based infrastructures that allowfor on-demand provision of ICT assets. Taking into consideration the complexity of distributed environments, significant challenges exist in providing and managing the offered on-demand resources with the required level of Quality of Service (QoS),especially for real-time interactive and streaming applications. In this paper we propose an approach for providing real-time QoS guarantees by enhancing service oriented infrastructures with coherent and consistent real-time attributes at various levels(application, network, storage, processing). The approach considers the full lifecycle of service-based systems including service engineering, Service Level Agreement (SLA) negotiation and management, service provisioning and monitoring. QoS parameters at application, platform and infrastructure levels are given specific attention as the basis for provisioning policies inthe context of temporal constraints.

Product Type : Academic Conferences

Author : Various

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Languages : English

An Efficient Algorithm To Find Test Pattern Using SSBDD

Company Description : Structurally Synthesized BDDs (SSBDDs) have an important characteristic property of keeping information about Boolean circuit’s structure. Boolean difference of a circuit is used to find test pattern for stuck at fault in combinational circuit but the algebraic manipulation involved in solving Boolean difference is a tedious job. In this paper an efficient algorithm is proposed to find the test patterns which use SSBDD based on Boolean difference concept. This model reduces algebraic manipulations and takes less time to compute the test pattern.

Product Type : Academic Conferences

Author : Various

PDF 5p

Languages : English

A Cache-based Anomaly Detector for Embedded Systems

Company Description : Embedded systems are being deployed as a part of critical infrastructures and are very vulnerable to faults and defects. Anomaly detection is often the primary means of providing early indication of faults and defects. Detecting an anomaly early on, pays off since further damage is avoided. This paper presents a cache-based method, which constructs a cache consisting of events from a stream of data considered to be normal .Consequently, during test stage, if an event does not exist in the cache, a miss will happen. An anomaly exists in test data provided that the hit rate of the cache does not reach a predefined threshold. The experiments on 112 standard benchmarks show that the cache-based method can detect 100% of anomalies. Also, the area overhead of the cache-based detector grows linearly, while the area overhead of other typical detectors grows exponentially by the increase in one of the detector's parameters.

Product Type : Academic Conferences

Author : Various

PDF 7p

Languages : English

Plug-in Based Debugging For Embedded Systems

Company Description : A flexible, plug-in based debugger is described. The debug system, built as a C++ interface class, is independent of the physical layer, which can be a network, aserial connection (e.g., RS232), or even a file on harddisk or flash memory. The plug-in mechanism is described and an example presented of how these are written to fit into the debugger environment.

Product Type : Academic Conferences

Author : Various

PDF 6p

Languages : English

Primes in Component Languages

Company Description : We investigate order-thoretic properties of sets of tuples of strings (component vectors) which provide a semantics for a model of software components. Under certain circumstances ("normality") on sets of such vectors, we characterise prime elements and establish prime algebraicity. We indicate how such work might constitute a formal basis for an automata theory of components.

Product Type : Academic Conferences

Author : Various

PDF 5p

Languages : English

Behavioural Presentations and an Automata Theory of Components

Company Description : In this paper, we make an intensive study of a mathematical model of components, as a preliminary to an analysis of problems arising in the area of component-based software. We begin with a simple model, link it to the behavioural presentation model, which suggests certain refinements of the original model. These refinements lead to an automata theory of components. Finally, we establish that two such automata determine the same component if and only if they are related by a form of behavioural equivalence, reminiscent of strong equivalence in CCS

Product Type : Academic Conferences

Author : Various

PDF 8p

Languages : English

Sign Language

Company Description : Usually a human interaction focuses on the sound world, where the communication is based on the speech and in which most information is conveyed via voice andother sounds. However, there are people who live in the world of silence. For them nothing can be heard, as they are hearing impaired. For all of them a voice communication is impossible or troublesome. Hence they have invented a sign language. The sign language consists of a grammar and a vocabulary. Usually the grammar is significantly different to the spoken and written languages.Where as the vocabulary is composed of many hand gestures and hand movements which convey the most important information, but which are supported by the whole body movement and facial expressions. Considering the differences in the way the hearing impaired observe the world, they encounter huge difficulties while learning and using the writing language, which is so common in daily communication. Since this sign language cannot be understand by others, we are in need of systems which can understand sign language. The existing systems handle that task not appropriate and accurate. We introduce the concept of a chat for the sign language based communication, which overcomes the deficiencies of the existing approaches. In the current system there is an action sensor available, this sensor has pressure switches when any pressure is given then the pressure switch will beclosed and the signal is given to microcontroller. The microcontroller senses the signal coming from the pressure switch and it understands the switch position and it sends the command signal to the computer through RS232 cable.The RS232 cable is used to convert microcontroller understandable signal to computer understandable signal. As soon as the computer gets the signal the program written in the computer will detect the particular wordand it will be played at the same instant. That’s how the sign language is converted in to voice language.

Product Type : Academic Conferences

Author : Various

PDF 4p

Languages : English

Improved Hybrid RMGT Distributed Scheduling Algorithm

Company Description : In the design of real time distributed system, the scheduling problem is considered to be an important one and has been addressed by many researches. However researches were developed many scheduling algorithm but there is no optimal dynamic scheduling algorithm. In this paper, we describe a heuristic scheduling algorithm which combines both static priority algorithm and dynamic algorithm. Initially a processor can be allocated a fixed number of units based on Rate Monotonic Algorithm and there will certain number of units are meant for dynamic algorithm. When a task arrives at a node, the local scheduler at that node attempts to guarantee that that the task will complete execution before its deadline, on that node. Ifthe attempt fails the scheduler searches the node where task will feasibly scheduled. This type of scheduling performs best results than the previous work and this algorithm are more suitable for real world applications.

Product Type : Academic Conferences

Author : Various

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Languages : English

Uniform scheduling of internal and external events under SRP-EDF

Company Description : With the growing complexity of modern embedded real-time systems, scheduling and managing of resources has become a daunting task. While scheduling and resource management for internal events can be simplified by adopting a common place real-time operating system (RTOS), scheduling and resource management for external events are left in the hands of the programmer, not to mention managing resources across the boundaries of external and internalevents. In this paper we propose a unified system view in corporating earliest deadline first (EDF) for scheduling andstack resource policy (SRP) for resource management. From an embedded real-time system view, EDF+SRP is attractive not only because stack usage can be minimized, but also because the cost of a pre-emption becomes almost as cheap as a regular function call, and the number of preemptions is kept to a minimum. SRP+EDF also lifts the burden of manual resource management from the programmer and incorporates it into the scheduler. Furthermore, we show the efficiency of the SRP+EDF scheme, the intuitiveness of the programming model (in terms of reactive programming), and the simplicity of the implementation.

Product Type : Academic Conferences

Author : Various

PDF 6p

Languages : English

A Reconfigurable Switch Architecture to Enhance Reliability of Network-on-Chips

Company Description : Switches and communication links of Network onChips (NoCs) are highly vulnerable to transient faults due to the use of nano-scale VLSI technologies in fabrication of NoCs. This paper proposes a reconfigurable switch architecture which is capable of operating in four configurations with different levels of reliability. This is done by the use of a local configuration controller logic which is fully protected against transient faults. When a controller detects a high error rate situation, it configures the switch to a high reliability mode and vice versa. Reconfiguration policy is designed in a way which minimizes the imposed performance and power overheads to the switch. Evaluations are done by a cycle accurate NoC simulator with Orion patch for power estimation. Simulation results show a noticeable reliability improvement with an egligible performance overhead. In addition, power saving ofat least 20% is achieved by the proposed architecture.

Product Type : Academic Conferences

Author : Various

PDF 7p

Languages : English

Guaranteed Bounds for the Control Performance Evaluation in Distributed System Architectures

Company Description : Controlling physical systems is a common task ofembedded systems. The requirements for a control system arecorrectness, stability and control performance. This leads to realtimeconstraints which have to be hold by the implementedcontroller. We present an approach that supports the controlengineer to get guaranteed bounds for the timing behavior of thecontroller at early design steps. This is done by connecting theMatlab/Simulink environment widely used for controller designto real-time analysis using a mapping between graphs.

Product Type : Academic Conferences

Author : Various

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Languages : English

Energy-Aware Scheduling for Embedded Real-Time Systems with Rechargeable Batteries

Company Description : Due to the power limited nature of embedded systems, power efficiency is one issue in the design of embedded systems.We propose a design in which an embedded system is powered by dual rechargeable batteries and the batteries don’t operate simultaneously. We propose a linear programming based approach to extend the lifetime of batteries. With the proposed approach, the lifetime of a battery will be extended and the design complexity of the system will be reduced. A simulation model is built to investigate the performance of the proposed approach. The capability of the proposed approach is evaluated by a series of simulations, for which we have encouraging results.

Product Type : Academic Conferences

Author : Various

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Languages : English

Effect of Exact Admission Controller on the Loss Ratio of EDF Scheduling Policy

Company Description : In this paper, we prove that the loss ratio of a G/G/1/G system with deadline till the end of service, operating under the EDF scheduling policy with preemption, can only be reduced by using an Exact Admission Controller. On the other hand, for a G/M/1/G system, this reduction is less than that arising from a simple modification of the EDF Scheduling policy, where a job about to get the server is automatically discarded if it is found at that time that itc cannot meet the deadline. Results of Monte Carlo simulations suggest that this modification produces substantial reduction of the loss ratio when the arrival rate is high, but the Exact Admission Controller is able to achieve comparable reduction of the loss ratio in this situation only if the mean relative deadline is large.

Product Type : Academic Conferences

Author : Various

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Languages : English

A Step Toward Exploiting Task-Affinity in Multi-Core Architectures to Improve Determinism of...

Company Description : Cooperative applications represent a class of multi-tasking programs where different tasks execute concurrently according to a producer-consumer pattern. This class of programs is increasingly adopted on multi-core architectures and especially on multimedia mobile devices based on MPSoCs. Indeed, it allows to better exploit the architectural parallelism. However, the run-time efficient usage of memory hierarchies still is mandatory to achieve really good performance. Moreover,when responsiveness and predictability of the application are required, obtaining strict real-time behaviors on these architectures is still an interesting research topic.This work proposes a software mechanism to enhance soft real-time behaviours of cooperative applications. Targeting the Linux kernel, this mechanism enhances its real-time scheduler by introducing the support for cache-aware scheduling. Onsome architectures, the experiments conducted on a synthetic benchmark allow to observe significant improvements, bothon execution predictability and data throughput. Further improvements already under investigation are fore seen to extend the benefits to more architectures.

Product Type : Academic Conferences

Author : Various

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Languages : English

Loss Ratios of EDF and FCFS Scheduling Policies under a Performance Enhancing Modification

Company Description : In a real time system, processor time is sometimes wasted on jobs that have no chance of being completed before their respective deadlines. Such wastage may be avoided by routinely discarding such jobs at the epoch of their getting the server. However, this modification, which is referred to in this paper as the Early job Discarding Technique (EDT), makes the scheduling policy dependent on service time. As a result, the optimality of the Earliest Deadline First (EDF) scheduling policy becomes inapplicable. We show in this paper that the said modification preserves the superiority of the EDF over the First Come First Serve (FCFS) scheduling policy in terms of loss ratio.Results of Monte Carlo simulations indicate that the gap between the loss ratios of the two scheduling policies under EDT widens with higher arrival rate. Index Terms—Firm real time system, real time queue, Earlies tDeadline First, First Come First Serve, service time dependent scheduling, loss ratio comparison.

Product Type : Academic Conferences

Author : Various

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Languages : English

GPS Based Carrier Synchronization Distributed Wireless Networks

Company Description : Networks of distributed wireless stations rely on carrier coherence and timing synchronization to lock the local oscillators and avoid the need for complex multi-carrier and timing acquisition. In this paper we present initial results of a frequency look loop and GPD based synchronization for distributed wireless networks.

Product Type : Academic Conferences

Author : Various

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Languages : English

Evaluation of Application Mapping for Network-on-Chips

Company Description : Mapping of tasks on the cores of a Network-on-Chip(NoC) has direct impact on the efficiency of the network. This paper provides a comprehensive study regarding application mapping for NoCs to clarify their pros and cons. The study considers different aspects including performance, power consumption, and reliability of mappings. Four mappings named NMAP, RMAP, Random, and Adhoc are used in this study by the means of a cycle accurate NoC simulator. Our study shows that the RMAP provides the maximum reliability for NoC with a low performance overhead. On the other hand, Random mapping requires the lowest time to complete mapping of the task on the chip. The power estimation patch of Orion is used in the simulation to explore the power consumption of a typical NoC using any of the mentioned mappings. Simulations are done for three different benchmarks i.e., MPEG, VOPD, and OPD application graphs.

Product Type : Academic Conferences

Author : Various

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Languages : English

A wireless medical network's research and development

Company Description : This paper introduces a wireless medical network's research and development. The wireless medical terminal is developed with radio frequency technology and biomedical sensor. The network can be simply set up and the communication modules work well according to the performance. The system runs a time-division full-duplex communication, the working state of each node is triggered by the receiving information, a responsive communication can be established between the nodes in forms of point to point or networks. And with the concisely designed structure and the transparent communication protocol,both software and hardware of the system can be easily upgraded. It’s a feasibility to expand wireless medical method.

Product Type : Academic Conferences

Author : Various

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Languages : English

Reconfigurable Logic for Synchronization of Endomicroscopy Scanning and Incrementally...

Company Description : The laser scanning confocal endomicroscope (LSCEM) is used to perform non-invasive, in vivo imaging at cell level. Online 3D LSCEM data visualization is thought of througha novel realtime computing system. We present such a system which performs three tasks in parallel: (i) provide automated controls for sequential acquisition of cross-sectional live images across depths on the tissue; (ii) manage and synchronize imaging and rendering tasks in real time; (iii) perform real time rendering on incrementally accumulated LSCEM datasets. Experimental results are promising.

Product Type : Academic Conferences

Author : Various

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Languages : English

A Power Saving Cache Architecture For Multi-Core Processor

Company Description : Reduce power consumption in the current multi-core processors is more important than performance enhancement. On chip cache memory (instruction cache and data cache) accounted for nearly 45% of power consumption in a processor, reducing the power consumption of cache memory will be able to significantly reduce processor power consumption. We propose a new level-0 cache memory in the memory hierarchy. The cache contains a filter cache and a victim cache. The proposed scheme reduces the power consumption in the instruction cache and data cache by reducing the number of accesses to the level-1 and level-2 cache. We use a simulation infrastructure base on SimpleScalar, sim-wattch, and CACTI to evaluate our proposed scheme. Our structure saves 28% power consumption as compared to the original memory architecture without victim cache and filter cache in multi-core processor. Simulation results show that the proposed technique improve the performance up to 15% compared to the conventional cache architecture.

Product Type : Academic Conferences

Author : Various

PDF 3p

Languages : English

Organizer : Global Science & Technology Forum

GSTF provides a global intellectual platform for top notch academics and industry professionals to actively interact and share their groundbreaking research achievements. GSTF is dedicated to promoting research and development and offers an inter-disciplinary intellectual platform for leading scientists, researchers, academics and industry professionals across Asia Pacific to actively consult, network and collaborate with their counterparts across the globe.